The present invention relates to non-volatile memories, and more particularly to Giant Magneto Resistive (GMR) memories that use one or more word lines and one or more digital lines to select and write individual memory bits.
Digital memories of various kinds are used extensively in computer and computer system components, digital processing systems and the like. Such memories can be formed, to considerable advantage, based on the storage of digital bits as alternative states of magnetization of magnetic materials in each memory cell, typically thin-film materials. These films may be thin magneto-resistive films having information stored therein based on the direction of the magnetization occurring in those films. The information is typically obtained either by inductive sensing to determine the magnetization state, or by magneto-resistive sensing of each state.
Such thin-film magneto-resistive memories may be conveniently provided on the surface of a monolithic integrated circuit to thereby provide easy electrical interconnection between the memory cells and the memory operating circuitry on the monolithic integrated circuit. When so provided, it is desirable to reduce the size and increase the packing density of the thin-film magneto-resistive memory cells to achieve a significant density of stored digital bits.
Many thin-film magneto-resistive memories include a number of parallel word lines intersected by a number of parallel digital lines. A thin magneto-resistive film is provided at the intersection of each word line and digital line. As such, the thin film magneto-resistive memory cells typically are configured an array configuration having a number of rows and a number of columns.
FIG. 1 is a schematic diagram illustrating a conventional thin film Magnetic Random Access Memory (MRAM) architecture. Parallel word lines 12, 14, 16, 18 and 20 are provided in a vertical direction and parallel digital lines 22 and 24 are provided in a horizontal direction. In the diagram shown, only a portion of the MRAM array is shown. A thin film magneto-resistive memory cell is provided at the intersection of each word line and digital line. Referring specifically to FIG. 1, thin film magneto-resistive memory cells 28a, 28b, 28c, 28d and 28e are provided at the intersection of digital line 22 and word lines 12, 14, 16, 18 and 20, respectively. Likewise, thin film magneto-resistive memory cells 30a, 30b, 30c, 30d and 30e are provided at the intersection of digital line 24 and word lines 12, 14, 16, 18 and 20, respectively.
The thin film magneto-resistive memory cells in each row are typically connected in a string configuration to form a corresponding sense line. For example, thin film magneto-resistive memory cells 28a, 28b, 28c, 28d and 28e, which correspond to row 32, are connected in a string configuration to form sense line 34. Sense line 34 typically includes a number of non-magnetic connectors 34a, 34b, 34c, 34d, 34e, and 34f to connect each end of the thin film magneto-resistive memory cells to the end of the adjacent thin film magneto-resistive memory cells. The non-magnetic connectors 34a, 34b, 34c, 34d, 34e, and 34f are typically formed using a conventional metal interconnect layer. The sense lines are used to provide current to a particular row of thin film magneto-resistive memory cells, and ultimately, to sense the resistance of a selected one of the cells.
To write a value (i.e. zero or one) to a selected memory cell, a word line current is provided to the word line that extends adjacent the selected memory cell. Likewise, a digital line current is provided to the digital line that extends adjacent the selected memory cell. In some instances, a sense line current is also provided to the sense line that that includes the selected memory cell.
The polarity of the word line current typically determines the value to be written into the selected memory cell. To illustrate this further, the magnetic fields produced by word line current 40, digital line current 42 and sense current 44 at memory cell 30a are shown in FIG. 1, assuming digital line 46 and word line 12 extend above memory cell 40. The polarity of the various currents would change if the corresponding word or digital line extend below the memory cell.
The magnetic field Hwl 48 produced by word line current 40 extends to the right and along the major axis of the memory cell 40 as shown. The magnetic field Hdl 50 produced by digital line current 42 extends upward and along the minor axis of the memory cell 40. Finally, the magnetic field Hsl 52 produced by sense line current 44 extends upward and along the minor axis of the memory cell 40.
The magnetic field Hwl 48 produced by word line current 40 provides the longitudinal force to switch the magnetization vector of the selected memory cell to the right, which in the example shown, corresponds to the desired value to be written. The magnetic fields Hdl 50 and Hsl 52 produced by digital line current 42 and sense line current 44, respectively, provide the lateral torque necessary to initiate the switching of the magnetic vector of the selected memory cell.
FIG. 2 is a graph showing a typical write margin curve for an MRAM memory cell. The x-axis of the graph represents the magnetic field component Hwl 48 that extends down the major axis of the memory cell 30a, typically provided by the word line current. The y-axis represents the magnetic field component Hdl 50 that extends across the minor axis of the memory cell 30a, typically provided by the digital line current (and sense line current when so provided). The various combinations of Hwl 48 and Hdl 50 that are required to write the memory cell 30a are represented by curve 56.
To provide some write margin, the sum of Hwl 48 and Hdl 50 (which produce a vector 58) must extend to the right of curve 56. The closer that the sum of Hwl 48 and Hdl 50 is to curve 56, the less write margin is present. As the write margin decreases, it becomes more difficult to reliably write a selected memory cell. It also becomes more difficult to prevent other non-selected memory cells from being inadvertently written. To overcome these limitations, there are often very stringent process requirements for control of bit dimensions, edge roughness, and bit end contamination levels in the memory cells. These process requirements can become particularly burdensome as the memory cell size decreases to increase packing density.
The magneto-resistive memory cells are often GMR type memory cells. GMR type cells typically include a number of magnetically layers separated by a number of non-magnetic coercive layers. To considerable advantage, the magnetic vectors in one or all of the layers of a GMR type cell can often be switched very quickly from one direction to an opposite direction when a magnetic field is applied over a certain threshold. The states stored in a GMR type cell can typically be read by passing a sense current through the memory cell via the sense line and sensing the difference between the resistances (GMR ratio) when one or both of the magnetic vectors switch.
A limitation of many GMR type cells is that the magnetic field required to switch the magnetic vectors can be relatively high, which means that relatively high switching currents are required. This increase in current, or magnetic field, can result in a substantial operating power, especially in large memory arrays. As the size of the GMR cells shrink to accommodate higher density applications, the switching fields that are required also increase. It is expected under such circumstances that the current density in the word and/or digital lines may become too high even for Cu metallization.
One way to increase the write margin and reduce the current density requirements of such a device is shown in FIG. 5 of the article xe2x80x9cExperimental and Analytical Properties of 0.2 Micron Wide, Multi-Layer, GMR, Memory Elementsxe2x80x9d, Pohm et al., IEEE Transactions on Magnetics, Volume 32, No. 5, September 1996. FIG. 5 of Pohm et al. shows a digital line traversing the memory cells at an angle relative to the major axis of the memory cell, and in a triangle shaped pattern. Referring to FIG. 3, such an arrangement may produce a magnetic field Hdl 70 that has two components: a component along the minor axis of the memory cell and a component along the major axis of the memory cell. When this is combined with the magnetic field Hwl 48 of the word line, the resulting magnetic vector 72 may extend further beyond curve 56 as shown, resulting in an increased write margin 74 and increased write selectivity relative to the MRAM architecture illustrative in FIG. 1.
A limitation the Pohm et al. is that the triangle shaped pattern of the digital line may significantly reduce the packing density of the memory, at least relative to a memory that uses substantially straight parallel digital lines and word lines. As can be seen in FIG. 5 of Pohm et al., the minimum spacing between the digital lines is shown to be 0.25 um, which is presumably dictated by the particular design rules of the process used. Assuming the digital lines traverse the memory cells at a 30 degree, the effective spacing between the digital lines in the y direction is 0.29 um (0.25 um/cos (30 degrees)), which represents a 16% reduction in packing density.
Another limitation of Pohm et al. is that the digital line configuration shown in FIG. 5 only produces a limited magnetic field component along the major axis of the memory cell. For some MRAM applications, it may be desirable to maximize the magnetic field component down the major axis of the memory cell. What would be desirable, therefore, is an MRAM architecture that produces an increased write margin and write selectivity without significantly reducing the packing density of the memory. What would also be desirable is an MRAM architecture that maximizes the magnetic field component along the major axis of the memory cell.
The present invention overcomes many of the disadvantages associated with the prior art by providing MRAM architectures that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The present invention also provides MRAM architectures that maximize the magnetic field component along the major axis of the memory cell.
In a first illustrative embodiment of the present invention, a magneto-resistive storage element is provided that includes an elongated magneto-resistive bit at the intersection of an elongated word line and an elongated digital line. The elongated digital line is substantially straight and extends substantially perpendicular to the elongated word line. In contrast to the prior art, however, the axis of the elongated magneto-resistive bit is offset relative to the axis of the elongated digital line and the axis of the elongated word line so as to be not parallel with the axis of the elongated digital line and not perpendicular to the axis of the elongated word line.
The elongated magneto-resistive storage element discussed above is preferably provided in an array of like elongated magneto-resistive bits to form a magneto-resistive (MRAM) memory. The array of magneto-resistive bits is preferably arranged to have a number of rows and columns. A number of elongated word lines are provided so as to extend substantially parallel to one another and adjacent only those magneto-resistive bits in a corresponding column. A number of elongated digital lines are also provided so as to extend substantially parallel to one another and adjacent only those magneto-resistive bits in a corresponding row. The magneto-resistive bits in each row of magneto-resistive bits are preferably electrically connected in a string configuration to form a corresponding sense line.
The major axis of each elongated magneto-resistive bits is preferably offset relative to the axes of the elongated digital lines and the axes of the elongated word lines so as to be not parallel with the axes of the elongated digital lines and not perpendicular to the axes of the elongated word lines. Because the major axis of the magneto-resistive bits are offset relative to axis of the digital line, the magnetic field Hdl produced by the digital line current at the magneto-resistive bit includes a component along the major axis of the magneto-resistive bit. As described above, this may help increase the write margin and write selectivity of the memory.
In another illustrative embodiment of the present invention, the relative orientation of the magneto-resistive bits to the digital lines is the same as described above. However, in this embodiment, the axes of the word lines are not perpendicular to the axes of the digital word lines. Rather, the axes of the word lines are substantially perpendicular to the major axis of the magneto-resistive bits. Like the previous embodiment, and because the major axis of the magneto-resistive bits are offset relative to axis of the digital line, the magnetic field Hdl produced by the digital line current at the magneto-resistive bit includes a component along the major axis of the magneto-resistive bit. As described above, this may help increase the write margin and write selectivity of the memory.
Unlike the previous embodiment, however, the axes of the word lines are substantially perpendicular to the major axis of the magneto-resistive bits. This helps keep the entire magnetic field Hwl produced by the word line current aligned with the major axis of the magneto-resistive bit, which may further help increase the write margin and write selectivity of the memory.
In another illustrative embodiment of the present invention, a MRAM memory is provided that maximizes the magnetic field components along the major axis of the memory cell. This may improve overall write margins and write selectivity of the memory, while reducing write line and/or digital line current requirements. In this embodiment, two or more elongated magneto-resistive bits are provided, each having an elongated word line and an elongated digital line extending adjacent thereto.
The axis of each of the elongated magneto-resistive bits is preferably substantially perpendicular to the axis of a corresponding elongated word line. This helps keep the entire magnetic field Hwl produced by the word line current aligned with the major axis of the magneto-resistive bit. In addition, however, the axis of each of the elongated digital lines extends substantially parallel to the axis of the elongated word line, at least in the region of each magneto-resistive bit. This may be accomplished by, for example, providing a zig-zag shaped digital line.
In this configuration, and because the elongated digital lines extend substantially parallel to the axis of the elongated word lines (and perpendicular to the axis of the elongated magneto-resistive bits), the entire magnetic field Hdl produced by the digital line current may be substantially aligned with the major axis of the magneto-resistive bits. For some applications, this may significantly improve the overall write margins and write selectivity of the memory, while reducing write line and/or digital line current requirements. When necessary, a magnetic field Hsl produced by a sense line current can be used to provide lateral torque to initially rotate the magnetic field vector of the magneto-resistive bits.